1. Field of the Invention
The present invention relates to a semiconductor device including a metal-insulator-metal (MIM) capacitor arrangement.
2. Description of the Related Art
In a representative process of producing a plurality of semiconductor devices, for example, a silicon wafer is prepared, and a surface of the silicon wafer is sectioned into a plurality of semiconductor chip areas which are defined by grid-like scribe lines formed in the silicon wafer. Then, the silicon wafer is processed by various well-known methods such that each of the semiconductor chip areas is produced as a semiconductor device, and a multi-layered wiring construction is formed over each of the semiconductor devices. Thereafter, the silicon wafer is subjected to a dicing process such that the plurality of semiconductor devices (i.e. bare chips) are individually cut and separated from each other.
When various integrated circuits, such as analog-to-digital (A/D) converters, digital-to-analog (D/A) converters, sample-and-hold circuits, and so on, are incorporated in each of the semiconductor devices on the silicon wafer, an arrangement of capacitors featuring a large capacitance must be established in the multi-layered wiring construction, because the large-capacitance capacitors are essential elements in the aforesaid various integrated circuits. As the large-capacitance capacitor, a metal-insulator-metal (MIM) capacitor is known in this field, as disclosed in, for example, JP-2004-511899.
The MIM capacitor includes plural pairs of electrode structures formed in a dielectric material of the multi-layered wiring construction. The electrode structures are substantially identical to each other, and are arranged in parallel with each other at regular intervals. Each of the electrode structures includes strip-like metal layers formed in respective insulating interlayers forming the multi-layered wiring construction, and via plugs formed in each of the insulating interlayers to thereby electrically connect the strip-like metal layers to each other. The two electrode structures in each pair define a capacitor, and then these capacitors are further connected in parallel to thereby define a large-capacitance capacitor.
When an MIM capacitor arrangement, including at least two large-capacitance capacitors or MIM capacitors, is established in the to multi-layered wiring construction, it is necessary to carry out the establishment of the MIM capacitor arrangement such that capacitances of the two MIM capacitors conform with each other as much as possible, before a proper operation of the aforesaid various integrated circuits can be ensured. Nevertheless, it is very difficult or impossible to obtain the conformity between the capacitances of the MIM capacitors, because the establishment of the MIM capacitor arrangement is inevitably subjected to process fluctuations, as stated in detail hereinafter.